Behavioral optimization using the manipulation of timing constraints

نویسندگان

  • Miodrag Potkonjak
  • Mani B. Srivastava
چکیده

We introduce a transformation, named rephasing, that manipulates the timing parameters in control-dataflow graphs (CDFGs) during the high-level synthesis of datapath intensive applications. Timing parameters in such CDFGs include the sample period, the latencies between input-output pairs, the relative times at which corresponding samples become available on different inputs, and the relative times at which the corresponding samples become available at the delay nodes (delay nodes in the CDFG of an ASIC correspond to state variables in the state-space). While some of the timing parameters may be constrained by performance requirements, or by the interface to the external world, others remain free to be chosen during the process of high-level synthesis. Traditionally high-level synthesis systems for datapath intensive have either assumed that all the relative times, called phases, when corresponding samples are available at input and delay nodes are zero (i.e., all input and delay node samples enter at the initial cycle of the schedule), or have automatically assigned values to these phases as part of the datapath allocation/scheduling step in the case of newer schedulers that use techniques like overlapped scheduling to generate complex time shapes. Rephasing, however, manipulates the values of these phases as an algorithm transformation before the scheduling/allocation stage. The advantage of this approach is that phase values can be chosen to transform and optimize the algorithm for explicit metrics like area, throughput, latency, power, register cost etc. Moreover, the rephasing transformation can be combined with other transformations such as algebraic transformations. We have developed techniques for using rephasing to optimize a variety of design metrics, and our results show significant improvements in several design metrics (throughput, area, power, fault-tolerance and partial-scan testability overhead). We have also investigated the relationship and interaction of rephasing with other high level synthesis tasks.

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عنوان ژورنال:
  • IEEE Trans. on CAD of Integrated Circuits and Systems

دوره 17  شماره 

صفحات  -

تاریخ انتشار 1998